This project explores efficient techniques for data movement on heterogeneous memory architectures, where applications can move data from any memory segment to any other memory segment. The runtime infrastructure for achieving such capabilities should aim to achieve adaptive and goal-oriented performance and power management through techniques that can utilize application requirements for data motion planning on such architectures.

Four broad research areas will be explored, as applicable to data movement on deep heterogeneous memory architectures:

• Programming constructs
• Performance and power/energy management
• Transparency through introspection tools, and
• Evaluation through an integrated test suite and various DOE applications.