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Electronics

Argonne maintains a wide-ranging science and technology portfolio that seeks to address complex challenges in interdisciplinary and innovative ways. Below is a list of all articles, highlights, profiles, projects, and organizations related specifically to electronics.

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  • A nanofibrous catalyst and method of manufacture
    Intellectual Property Available to License
    US Patent 9,350,026; US Patent Application: 15/144,650
    • Nanofibrous electrocatalysts (ANL-IN-12-063)

    A precursor solution of a transition metal based material is formed into a plurality of interconnected nanofibers by electro-spinning the precursor solution with the nanofibers converted to a catalytically active material by a heat treatment. Selected subsequent treatments can enhance catalytic activity.

     

  • An efficient deposition process is provided for fabricating reliable RF MEMS capacitive switches with multilayer ultrananocrystalline films for more rapid recovery, charging and discharging that is effective for more than a billion cycles of operation.
    Intellectual Property Available to License
    US Patent 8,354,290
    • Ultrananocrystalline diamond films with optimized dielectric properties for advanced RF MEMS capacitive switches (ANL-IN-09-070)

    Significantly, the deposition process is compatible for integration with CMOS electronics and thereby can provide monolithically integrated RF MEMS capacitive switches for use with CMOS electronic devices, such as for insertion into phase array antennas for radars and other RF communication systems.

    Benefits

    • A specialized radio frequency (RF) micro-electromechanical system (MEMS) switch that promises enhanced capabilities for next-generation military and commercial communication systems 
    • Robust and reliable with extremely low power consumption; prevents overcharge and improves safety 
    • CMOS compatible 

     

  • An efficient deposition process is provided for fabricating reliable RF MEMS capacitive switches with multilayer ultrananocrystalline films for more rapid recovery, charging and discharging that is effective for more than a billion cycles of operation.
    Intellectual Property Available to License
    US Patent 9,269,519
    • UNCD Films with optimized dielectric properties for advanced RF MEMS capacitive switches (ANL-IN-09-070C)

    Significantly, the deposition process is compatible for integration with CMOS electronics and thereby can provide monolithically integrated RF MEMS capacitive switches for use with CMOS electronic devices, such as for insertion into phase array antennas for radars and other RF communication systems.

    Benefits

    • A specialized radio frequency (RF) micro-electromechanical system (MEMS) switch that promises enhanced capabilities for next-generation military and commercial communication systems 
    • Robust and reliable with extremely low power consumption; prevents overcharge and improves safety 
    • CMOS compatible 

     

  • A reliable long life RF-MEMS capacitive switch
    Intellectual Property Available to License
    US Patent 8,525,185
    • RF MEMS Capacitive Switches With High Reliability (ANL-IN-09-053)

    A reliable long life RF-MEMS capacitive switch is provided with a dielectric layer comprising a fast discharge diamond dielectric layer” and enabling rapid switch recovery, dielectric layer charging and discharging that is efficient and effective to enable RF-MEMS switch operation to greater than or equal to 100 billion cycles.

    Benefits

    • A specialized radio frequency (RF) micro-electromechanical system (MEMS) switch that promises enhanced capabilities for next-generation military and commercial communication systems 
    • Robust and reliable with extremely low power consumption; prevents overcharge and improves safety 
    • CMOS Compatible 

     

  • A system and method for forming graphene layers on a substrate
    Intellectual Property Available to License
    US Patent 8,906,772
    • Graphene Layer Formation at Low Substrate Temperature on a Metal and Carbon Based Substrate (ANL-IN-11-055)

    The system and methods include direct growth of graphene on diamond and low temperature growth of graphene using a solid carbon source.

    Benefits

    • Direct growth of graphene on insulating substrate at wafer-scale 
    • Order of magnitude increase in breakdown current density reaching up to one thousand times improvement over conventional metal based interconnects
  • A system and method for forming graphene layers on a substrate
    Intellectual Property Available to License
    US Patent 9,875,894; US Patent Application 15/064330 
    • Graphene Layer Formation at Low Substrate Temperature on a Metal and Carbon Based Substrate (ANL-IN-11-055C)

    The system and methods include direct growth of graphene on diamond and low temperature growth of graphene using a solid carbon source.

    Benefits

    • Direct growth of graphene on insulating substrate at wafer-scale 
    • Order of magnitude increase in breakdown current density reaching up to one thousand times improvement over conventional metal based interconnects 

     

  • A system and method for forming graphene layers on a substrate
    Intellectual Property Available to License
    US Patent 8,652,946
    • Graphene Layer Formation on a Carbon Based Substrate (ANL-IN-12-024)

    The system and methods include direct growth of graphene on diamond and low temperature growth of graphene using a solid carbon source.

    Benefits

    • Direct growth of graphene on insulating substrate at wafer-scale 
    • Order of magnitude increase in breakdown current density reaching up to one thousand times improvement over conventional metal based interconnects 
  • A system and method for forming graphene layers on a substrate
    Intellectual Property Available to License
    US Patent 9,202,684
    • Graphene Layer Formation on a Carbon Based Substrate (ANL-IN-11-055B)

    The system and methods include direct growth of graphene on diamond and low temperature growth of graphene using a solid carbon source.

    Benefits

    • Direct growth of graphene on insulating substrate at wafer-scale 
    • Order of magnitude increase in breakdown current density reaching up to one thousand times improvement over conventional metal based interconnects
  • A method for coating a dielectric substrate with a R-GO film includes positioning the dielectric substrate in a chamber which is purged with a first gas to adjust a pressure of the chamber to a first pressure
    Intellectual Property Available to License
    US Patent 10,351,429 B2
    • Direct Synthesis of Reduced Graphene Oxide Films on Dielectric Substrates (ANL-IN-14-110)

    A second gas at a second flow rate and a third gas at a third flow rate is inserted into the chamber to increase the chamber pressure to a second pressure greater than the first pressure. A chamber temperature is increased to a first temperature. The flow of the second gas and the third gas is stopped. The chamber is purged to a third pressure higher than the first pressure and lower than the second pressure. The pressure of the chamber is set at a fourth pressure greater than the first pressure and the third pressure. A fourth gas is inserted into the chamber at a fourth flow rate for a first time.

    Benefits

    • Optically transparent, CVD deposition of reduced graphene oxide film directly on the glass substrate 
    • Wafer-scale synthesis in few mins 
    • Pin-hole free deposition 
    • Moderate sheet resistance at lower thickness 
    • High thermal conductivity than Tin Oxide 
  • A two-dimensional thin film transistor and a method for manufacturing a two-dimensional thin film transistor
    Intellectual Property Available to License
    US Patent 9,548,394
    • All 2D, high mobility, flexible, transparent thin film transistor

    A two-dimensional thin film transistor and a method for manufacturing a two-dimensional thin film transistor includes layering a semiconducting channel material on a substrate, providing a first electrode material on top of the semiconducting channel material, patterning a source metal electrode and a drain metal electrode at opposite ends of the semiconducting channel material from the first electrode material, opening a window between the source metal electrode and the drain metal electrode, removing the first electrode material from the window located above the semiconducting channel material providing a gate dielectric above the semiconducting channel material, and providing a top gate above the gate dielectric, the top gate formed from a second electrode material. The semiconducting channel material is made of tungsten diselenide, the first electrode material and the second electrode material are made of graphene, and the gate dielectric is made of hexagonal boron nitride.

    Benefits

    • Flexible, transparent high mobility thin film transistor for flat panel display 
    • 10 atomic layers thick 
    • On/off ratio is as good as current commercial thin-film transistors